InGaAs/InP heterojunction bipolar transistors with low offset voltage and current blocking

Author

Chen, Shu-Han ; Lee, Men-Lin ; Chen, Po-Han ; Wang, Sheng-Yu ; Tseng, Ming-Yuan ; Chyi, Jen-Inn

Author_Institution

Dept. of Electr. Eng., Nat. Central Univ., Chung-li, Taiwan

Volume

2

fYear

2003

fDate

15-19 Dec. 2003

Abstract

InGaAs/InP double heterojunction bipolar transistor with low offset voltage and low collector current blocking effect have been obtained using a combination of InGaAs spacers at the BE and BC junctions, and a highly doped n-type InP layer in the collector region. It is found that increasing the doping concentration of the n⁺-InP layer is more effective in lowering current blocking effect than increasing the InGaAs BC spacer thickness. Increasing base doping concentration is shown to be effective as well.

Keywords

III-V semiconductors; bipolar transistors; gallium compounds; indium compounds; semiconductor device testing; semiconductor doping; semiconductor heterojunctions; InGaAs spacers; InGaAs-InP; doping concentration; heterojunction bipolar transistors; low collector current blocking; low offset voltage; n-type InP layer; Breakdown voltage; Circuits; Doping; Double heterojunction bipolar transistors; Heterojunction bipolar transistors; Indium gallium arsenide; Indium phosphide; Low voltage; Optical materials; Sheet materials;

fLanguage

English

Publisher

ieee

Conference_Titel

Lasers and Electro-Optics, 2003. CLEO/Pacific Rim 2003. The 5th Pacific Rim Conference on

Print_ISBN

0-7803-7766-4

Type

conf

DOI

10.1109/CLEOPR.2003.1276986

Filename

1276986