DocumentCode
408429
Title
5 mW, 64 dB SNDR, 4th order bandpass ΣΔ modulator for 10.7 MHz digital IF
Author
Noman, Ahmed ; Sharaf, Khaied ; Ragai, Hany Fikry
Author_Institution
RFIC Group, MEMSCAP, Cairo, Egypt
fYear
2003
fDate
9-11 Dec. 2003
Firstpage
114
Lastpage
117
Abstract
A 5 mW 4th order SC bandpass sigma-delta modulator is designed in 0.8-μm CMOS process. An SNDR of 64.8 dB over 200 kHz, and image-rejection better than 80 dB are achieved by adapting double-sampling technique in circulating-delay-type resonator. The resonator is built using a high performance gain-boosted folded-cascode opamp. An improved SC-CMFB circuit is proposed to support double-sampling requirements. The opamp achieves 106 dB of DC gain, 180 MHz GBW with 750 mA at 3 V supply.
Keywords
CMOS integrated circuits; band-pass filters; capacitor switching; modulators; operational amplifiers; resonators; 0.8 micron; 10.7 MHz; 106 dB; 180 MHz; 200 kHz; 3 V; 5 mW; 64 dB; 750 mA; CMOS process; SNDR; adapting double-sampling technique; bandpass modulator; circulating-delay-type resonator; gain-boosted folded-cascode opamp; image-rejection; intermediate frequency; switch capacitor bandpass; Amplitude modulation; Capacitors; Circuits; Degradation; Delay; Delta modulation; Digital modulation; Power amplifiers; Sampling methods; Switches;
fLanguage
English
Publisher
ieee
Conference_Titel
Microelectronics, 2003. ICM 2003. Proceedings of the 15th International Conference on
Print_ISBN
977-05-2010-1
Type
conf
DOI
10.1109/ICM.2003.1287735
Filename
1287735
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