A novel SiC J-FET gate drive circuit for sparse matrix converter applications

Author

Heldwein, Marcelo L. ; Kolar, Johann W.

Author_Institution

Power Electron. Syst. Lab., Swiss Fed. Inst. of Technol., Zurich, Switzerland

Volume

1

fYear

2004

fDate

2004

Firstpage

116

Abstract

Three-phase AC/AC sparse matrix converters (SMC) show a low realization effort and a low control complexity and are therefore of potential interest for industry applications. In this paper a novel gate drive circuit for a SiC J-FETs to be employed in an AII-SiC-SMC is proposed. The gate drive requirements of SiC J-FETs are clarified and the operating principle of the driver circuit is discussed and practically verified in a bridge leg topology. The experimental analysis shows significant advantages of the proposed system over known SiC J-FET driver circuits concerning switching delay time and switching losses.

Keywords

AC-AC power convertors; driver circuits; junction gate field effect transistors; matrix convertors; silicon compounds; sparse matrices; switching convertors; wide band gap semiconductors; SMC; SiC; SiC J-FET; bridge leg topology; control complexity; gate drive circuit; industry application; realization effort; sparse matrix converter; switching delay time; switching loss; three-phase AC-AC converters; Bridge circuits; Circuit topology; Driver circuits; Drives; Industry applications; Leg; Matrix converters; Silicon carbide; Sliding mode control; Sparse matrices;

fLanguage

English

Publisher

ieee

Conference_Titel

Applied Power Electronics Conference and Exposition, 2004. APEC '04. Nineteenth Annual IEEE

Print_ISBN

0-7803-8269-2

Type

conf

DOI

10.1109/APEC.2004.1295797

Filename

1295797