Transistor test structures for leakage current analysis of partial SOI

Author

Yeo, Kyoung Hwan ; Oh, Chang Woo ; Kim, Sung-Min ; Kim, Min-Sang ; Lee, Sung-Young ; Li, Ming ; Cho, Hye-Jin ; Yoon, Eun-Jung ; Kim, Sung-Hwan ; Choe, Jeong-Dong ; Kim, Dong-Won ; Park, Donggun ; Kim, Kinam

Author_Institution

R&D Center, Samsung Electron. Co., Kyunggi-Do, South Korea

fYear

2004

fDate

22-25 March 2004

Firstpage

245

Lastpage

246

Abstract

A new test structure to directly measure the junction leakage current between the channel and source/drain region is developed with partially-insulated structure. Si/SiGe epitaxial growth and selective SiGe etch process are used to form PiOX (Partially-Insulating OXide) under source and drain. With this structure, the junction leakage current between source/drain and substrate is diminished and the leakage current component from channel region and source/drain is easily measured.

Keywords

MOSFET; leakage currents; semiconductor device reliability; semiconductor device testing; silicon-on-insulator; CMOS processes; MOSFET; blocking layers; epitaxial growth; junction leakage current; leakage current analysis; oxide CMP; partial SOI; partially-insulated structure; process integration; reliability; selective etch process; transistor test structures; Current measurement; Electronic equipment testing; Epitaxial growth; Etching; Germanium silicon alloys; Insulation; Leakage current; MOSFET circuits; Silicon germanium; Substrates;

fLanguage

English

Publisher

ieee

Conference_Titel

Microelectronic Test Structures, 2004. Proceedings. ICMTS '04. The International Conference on

Print_ISBN

0-7803-8262-5

Type

conf

DOI

10.1109/ICMTS.2004.1309488

Filename

1309488