DocumentCode
414481
Title
Statistical estimation of circuit timing vulnerability due to leakage-induced power grid voltage drop
Author
Ferzli, Had A. ; Najm, Farid N.
Author_Institution
Dept. of ECE, Univ. of Toronto, Ont., Canada
fYear
2004
fDate
2004
Firstpage
17
Lastpage
24
Abstract
Statistical Vt variations lead to large variations of leakage current, which cause statistical voltage drops on the power grid that can affect Circuit timing. We propose a statistical analysis technique whereby variances of the leakage currents are used to estimate the susceptibility to timing violations due to leakage-induced voltage drops.
Keywords
covariance analysis; covariance matrices; electric potential; integrated circuit reliability; leakage currents; log normal distribution; timing; circuit timing vulnerability; covariance matrix; critical path; integrated circuits; joint probability distribution; joint statistics; leakage current variances; leakage-induced power grid voltage drop; multivariate lognormal; power grid; statistical estimation; statistical voltage drops; within-die variations; Contracts; Electricity supply industry; Electronics industry; Integrated circuit technology; Leakage current; Power grids; Semiconductor device measurement; Statistical analysis; Threshold voltage; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Integrated Circuit Design and Technology, 2004. ICICDT '04. International Conference on
Print_ISBN
0-7803-8528-4
Type
conf
DOI
10.1109/ICICDT.2004.1309896
Filename
1309896
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