• DocumentCode
    415651
  • Title

    Effects of thin SiN interface layer on transient I-V characteristics and stress induced degradation of high-k dielectrics

  • Author

    Kang, C.Y. ; Cho, H.-J. ; Kang, C.S. ; Choi, R. ; Kim, Y.H. ; Rhee, S.J. ; Choi, C.H. ; Akbar, S.M. ; Lee, J.C.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Texas Univ., Austin, TX, USA
  • fYear
    2004
  • fDate
    25-29 April 2004
  • Firstpage
    587
  • Lastpage
    588
  • Abstract
    In this work, we present the effects of a SiN interface on charge trapping and de-trapping characteristics and time-dependent threshold voltage instability. The use of SiN interface structure was found to reduce the degradation in Dit and Gm even though it yielded higher bulk charge trapping. The higher bulk trap was evidenced from larger after-stress Vth degradation. Thus, it is believed that mobility degradation in HfO2 is primarily caused by the degraded quality of the interfacial layer.
  • Keywords
    defect states; dielectric thin films; interface states; interface structure; semiconductor device breakdown; semiconductor device reliability; silicon compounds; charge trapping; de-trapping characteristics; high-k dielectrics; stress induced degradation; thin SiN interface layer; time-dependent threshold voltage instability; transient I-V characteristics; Capacitance-voltage characteristics; Charge pumps; Current measurement; Degradation; Dielectric measurements; High-K gate dielectrics; MOSFETs; Silicon compounds; Stress; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Reliability Physics Symposium Proceedings, 2004. 42nd Annual. 2004 IEEE International
  • Print_ISBN
    0-7803-8315-X
  • Type

    conf

  • DOI
    10.1109/RELPHY.2004.1315402
  • Filename
    1315402