DocumentCode
415661
Title
PMOS thin gate oxide recovery upon negative bias temperature stress
Author
Akbar, Mohammad S. ; Agostinelli, Marty ; Rangan, Sanjay ; Lau, Shing ; Castillo, Cesar ; Pae, Sangwoo ; Kashyap, Sridhar
Author_Institution
Microelectron. Res. Center, Texas Univ., Austin, TX, USA
fYear
2004
fDate
25-29 April 2004
Firstpage
683
Lastpage
684
Abstract
The recovery behavior of thin gate PMOS devices, under both static and dynamic stress conditions, has been investigated. It has been observed that the thin gate recovery characteristics after a negative bias temperature stress exhibit a universal behavior, irrespective of stress duration, stress electric fields and channel lengths. This universality is similar to what was previously observed for thick gate PMOS devices; however, the non-universal dependence on temperature is much different than reported in an earlier work. Thin gate recovery shows similar behavior under static and low frequency dynamic stress, but the recovery reduces under high frequency stress.
Keywords
CMOS integrated circuits; integrated circuit reliability; invertors; PMOS thin gate oxide recovery; channel lengths; dynamic stress conditions; negative bias temperature stress; static stress conditions; stress duration; stress electric fields; thin gate recovery characteristics; universal behavior; Degradation; Educational institutions; Frequency; Hydrogen; MOS devices; Negative bias temperature instability; Niobium compounds; Sampling methods; Stress; Titanium compounds;
fLanguage
English
Publisher
ieee
Conference_Titel
Reliability Physics Symposium Proceedings, 2004. 42nd Annual. 2004 IEEE International
Print_ISBN
0-7803-8315-X
Type
conf
DOI
10.1109/RELPHY.2004.1315450
Filename
1315450
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