• DocumentCode
    416075
  • Title

    Development of a high reliability and large volume manufacturing assembly process for a stacked memory package

  • Author

    Priore, R. Scott ; Burton, Anthony

  • Author_Institution
    Cisco Syst., Inc., San Jose, CA, USA
  • Volume
    1
  • fYear
    2004
  • fDate
    1-4 June 2004
  • Firstpage
    1142
  • Abstract
    The demand for multiple features in today´s electronic products, coupled with the on-going trend for smaller and lighter devices, has lead to the ever-increasing component densities of printer circuit boards (PCB). Consequently, new and innovative ways to use existing PCB area is imperative. One method is to use stacked leaded packages for memory devices. Although this idea has been around for several years in small handheld applications, their usage on large, thick mother boards for telecomm applications have not been widely adopted. Several challenges exist and must be addressed prior to large-scale production. This paper addresses three manufacturing issues that arose during the development cycle of the product. In addition, the long-term reliability of the stacked component is also discussed.
  • Keywords
    assembling; integrated circuit packaging; integrated circuit reliability; random-access storage; surface mount technology; voids (solid); SDRAM; SMT; TSOP; high reliability assembly process; large volume manufacturing; long-term reliability; stacked leaded packages; stacked memory package; telecomm mother boards; voids; Assembly; Coupling circuits; Electronics packaging; Large-scale systems; Manufacturing processes; Optical coupling; Printed circuits; Printers; Production; Telecommunications;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronic Components and Technology Conference, 2004. Proceedings. 54th
  • Print_ISBN
    0-7803-8365-6
  • Type

    conf

  • DOI
    10.1109/ECTC.2004.1319485
  • Filename
    1319485