A sigma-delta modulator for digital hearing instruments using 0.18μm CMOS technology

Author

Taha, Iman Y. ; Ahmadi, M. ; Miller, W.C.

Author_Institution

Dept. of Electr. & Comput. Eng., Windsor Univ., Ont., Canada

fYear

2004

fDate

19-21 July 2004

Firstpage

233

Lastpage

236

Abstract

This paper examines the design and implementation of a single-loop second-order CMOS sigma-delta modulator for digital audio hearing-aid applications. The modulator circuit features reduced complexity, area reduction and low conversion energy. It has a sampling rate of 8.2MHz with an over-sampling ratio (OSR) of 256 to provide an audio bandwidth of 16kHz. The modulator is implemented in a 0.18μm CMOS technology with metal-to-metal sandwich structure capacitors. It operates with a supply voltage of 1.8V. The active area is 0.403 mm². The modulator achieves a 98dB signal-to-noise-and-distortion ratio (SNDR) and a 100dB dynamic range (DR) at a Nyquist conversion rate of 32kHz and consumes 1321 μW with a joule/conversion figure of merit equal to 161x10^-12J/s.

Keywords

CMOS digital integrated circuits; capacitors; hearing aids; metal-semiconductor-metal structures; sigma-delta modulation; 0.18 micron; 1.8 V; 1321 muW; 16 kHz; 32 kHz; 8.2 MHz; CMOS technology; Nyquist conversion rate; digital hearing instruments; metal-to-metal sandwich structure capacitors; modulator circuit; sigma-delta modulator; signal-to-noise-and-distortion ratio; switched capacitor; Auditory system; Bandwidth; CMOS technology; Capacitors; Circuits; Delta-sigma modulation; Digital modulation; Instruments; Sampling methods; Sandwich structures;

fLanguage

English

Publisher

ieee

Conference_Titel

System-on-Chip for Real-Time Applications, 2004.Proceedings. 4th IEEE International Workshop on

Print_ISBN

0-7695-2182-7

Type

conf

DOI

10.1109/IWSOC.2004.1319885

Filename

1319885