DocumentCode

416263

Title

First-order incremental block-based statistical timing analysis

Author

Visweswariah, Chandu ; Ravindran, Kaliappa ; Kalafala, K. ; Walker, S.G. ; Narayan, S.

Author_Institution

IBM Research T. J. Watson Research Center, Yorktown Heights, NY

fYear

2004

fDate

7-11 July 2004

Firstpage

331

Lastpage

336

Keywords

Algorithm design and analysis; Costs; Delay; Digital integrated circuits; Manufacturing; Microelectronics; Optimization methods; Permission; Robustness; Timing;

fLanguage

English

Publisher

ieee

Conference_Titel

Design Automation Conference, 2004. Proceedings. 41st

Conference_Location

San Diego, CA, USA

ISSN

0738-100X

Print_ISBN

1-51183-828-8

Type

conf

Filename

1322499