DocumentCode
416273
Title
Area-efficient instruction set synthesis for reconfigurable system-on-chip designs
Author
Brisk, Philip ; Kaplan, Adam ; Sarrafzadeh, Majid
Author_Institution
University of California, Los Angeles, CA
fYear
2004
fDate
7-11 July 2004
Firstpage
395
Lastpage
400
Keywords
Acceleration; Computer science; Field programmable gate arrays; Hardware; Integer linear programming; Program processors; Resource management; Silicon compiler; System-on-a-chip; VLIW;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 2004. Proceedings. 41st
Conference_Location
San Diego, CA, USA
ISSN
0738-100X
Print_ISBN
1-51183-828-8
Type
conf
Filename
1322511
Link To Document