DocumentCode

416335

Title

FPGA power reduction using configurable dual-Vdd

Author

Li, Fei ; Lin, Yan ; He, Lei

Author_Institution

University of California, Los Angeles, CA

fYear

2004

fDate

7-11 July 2004

Firstpage

735

Lastpage

740

Keywords

Algorithm design and analysis; Clocks; Delay; Design automation; Fabrics; Field programmable gate arrays; Logic circuits; Logic design; Power supplies; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Design Automation Conference, 2004. Proceedings. 41st

Conference_Location

San Diego, CA, USA

ISSN

0738-100X

Print_ISBN

1-51183-828-8

Type

conf

Filename

1322580