DocumentCode
416338
Title
Tradeoffs between gate oxide leakage and delay for dual T/sub ox/ circuits
Author
Sultania, Anup Kumar ; Sylvester, Dennis ; Sapatnekar, Sachin S.
Author_Institution
University of Minnesota, Minneapolis, MN
fYear
2004
fDate
7-11 July 2004
Firstpage
761
Lastpage
766
Keywords
CMOS technology; Circuits; Constraint optimization; Delay; Leakage current; MOS devices; Permission; Power generation; Tunneling; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 2004. Proceedings. 41st
Conference_Location
San Diego, CA, USA
ISSN
0738-100X
Print_ISBN
1-51183-828-8
Type
conf
Filename
1322584
Link To Document