DocumentCode

416347

Title

Re-synthesis for delay variation tolerance

Author

Chang, Shih-Chieh ; Hsieh, Cheng-Tao ; Wu, Kai-Chiang

Author_Institution

National Tsing Hua University, Taiwan

fYear

2004

fDate

7-11 July 2004

Firstpage

814

Lastpage

819

Keywords

Artificial intelligence; Circuit noise; Circuit optimization; Degradation; Delay; Logic; Permission; Protection; Timing; Wires;

fLanguage

English

Publisher

ieee

Conference_Titel

Design Automation Conference, 2004. Proceedings. 41st

Conference_Location

San Diego, CA, USA

ISSN

0738-100X

Print_ISBN

1-51183-828-8

Type

conf

Filename

1322594