DocumentCode
41692
Title
Nested Multilevel Topologies
Author
Cipriano dos Santos, Euzeli ; Gonzaga Muniz, Joao Helder ; Cabral da Silva, Edison Roberto ; Jacobina, Cursino Brandao
Author_Institution
Electr. & Comput. Eng. Dept., Indiana Univ.-Purdue Univ. Indianapolis, Indianapolis, IN, USA
Volume
30
Issue
8
fYear
2015
fDate
Aug. 2015
Firstpage
4058
Lastpage
4068
Abstract
This paper proposes multilevel topologies based on the concept of nested arrangement. Such topologies are called nested multilevel converters, since the central point of the legs are connected at the same point, with the external legs involving the internal ones. Nested configurations present advantages as compared to the equivalent NPC topologies in terms of reduced number of diodes and consequently higher efficiency. In addition to proposing a new family of power electronics converters, this paper presents an optimized pulse width modulation strategy that allows synthesizing voltage waveforms with higher quality, a losses comparison with the NPC topology, and a general comparison with other topologies proposed in the technical literature. Simulated and experimental results are presented to validate the theoretical expectations.
Keywords
PWM power convertors; equivalent NPC topologies; external legs; losses comparison; nested arrangement; nested multilevel converters; nested multilevel topologies; power electronics converters; pulse width modulation strategy; voltage waveforms; Inverters; Lead; Pulse width modulation; Switches; Topology; Vectors; DC-AC power converters; inverters; power electronics; pulse width modulation converters; static converters;
fLanguage
English
Journal_Title
Power Electronics, IEEE Transactions on
Publisher
ieee
ISSN
0885-8993
Type
jour
DOI
10.1109/TPEL.2014.2351392
Filename
6882185
Link To Document