Highly-linear, current-feedback resistive source-degenerated MOS transconductor

Author

Khumsa, Phanumas ; Worapishet, Apisak

Author_Institution

Dept. of Electr. Eng., Prince of Songkla Univ., Thailand

Volume

1

fYear

2004

fDate

23-26 May 2004

Abstract

Compact current-feedback resistive source-degenerated CMOS transconductors have been designed in 0.35 μm CMOS twin-well process. The proposed transconductors possess a superior linearity performance and with a similar level of g_m/current efficiency compared to an ordinary source-degenerated transconductor. They require no extra bias current source owing to a feedback cross-coupling and current-reuse technique. A single unit G_m of 30 μm operates under 3.0 V supply voltage and consumes 36 μA with an input range of ±0.8 V. Compared to the conventional G_m it achieved better THD performance as much as 10 dB with an input amplitude up to 0.8 V and frequency up to 1 MHz.

Keywords

CMOS analogue integrated circuits; circuit feedback; circuit simulation; convertors; harmonic distortion; integrated circuit design; 0.35 micron; 0.8 V; 1 MHz; 3 V; 30 micron; 36 muA; CMOS transconductors; CMOS twin-well process; MOS transconductor; THD performance; bias current source; current efficiency; current-feedback resistive transconductor; current-reuse; feedback cross-coupling; input amplitude; source-degenerated transconductor; superior linearity performance; supply voltage; transconductor designing; CMOS process; CMOS technology; Circuits; Design engineering; Feedback loop; Linearity; Microelectronics; Resistors; Transconductors; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2004. ISCAS '04. Proceedings of the 2004 International Symposium on

Print_ISBN

0-7803-8251-X

Type

conf

DOI

10.1109/ISCAS.2004.1328288

Filename

1328288