Quantum circuit design of 8 × 8 discrete Hartley transform

Author

Tseng, Chien-Cheng ; Hwang, Tsung-Ming

Author_Institution

Dept. of Comput. & Commun. Eng., National Kaohsiung First Univ. of Sci. & Technol., Taiwan

Volume

3

fYear

2004

fDate

23-26 May 2004

Abstract

In this paper, the 8 × 8 discrete Hartley transform will be implemented by using quantum elementary gates such as controlled NOT gates and Hadamard gates. Two steps involved are as follows: first, the discrete Hartley transform matrix is decomposed into the product of several sparse unitary matrices using the structure of fast Hartley transform algorithm. Then, each sparse matrix is implemented by elementary quantum gates and cascade them to obtain the final circuit. The design results show that the proposed design method has less circuit complexity than the conventional Cybenko´s method.

Keywords

circuit complexity; discrete Hartley transforms; integrated circuit design; matrix decomposition; quantum gates; sparse matrices; Cybenko method; Hadamard gate; circuit complexity; controlled NOT gate; discrete Hartley transform; fast Hartley transform algorithm; matrix decomposition; quantum circuit design; quantum elementary gates; sparse matrix cascading; sparse unitary matrix; Circuit synthesis; DH-HEMTs; Discrete Fourier transforms; Discrete cosine transforms; Discrete transforms; Fourier transforms; Matrix decomposition; Quantum computing; Signal processing algorithms; Sparse matrices;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2004. ISCAS '04. Proceedings of the 2004 International Symposium on

Print_ISBN

0-7803-8251-X

Type

conf

DOI

10.1109/ISCAS.2004.1328767

Filename

1328767