An on-chip delay measurements module for nanostructures characterization

Author

Duval, O. ; Savaria, Y.

Author_Institution

Dept. of Electr. Eng., Ecole Polytechnique de Montreal, Que., Canada

Volume

3

fYear

2004

fDate

23-26 May 2004

Abstract

Exploring nanoelectronic devices requires extensive physical testing of several new materials to determine their electronic characteristics as stated by P.J. Burke (2003). In particular, circuit designers need to characterize delays introduced by nanostructures. This paper proposes on-chip frequency measurement units (MU) designed for measuring delays across nanoelectronic devices. Extensive calculations and simulations show that the structure presented in this paper can measure delays as small as 7 picoseconds. The MU is part of a test platform for nanostructures designed in 180 nm TSMC CMOS that is currently in fabrication.

Keywords

CMOS integrated circuits; circuit analysis computing; delay lines; frequency measurement; nanoelectronics; 180 nm; TSMC CMOS; delay measurements module; electronic characteristics; nanoelectronic devices; nanostructures characterization; on-chip delay measurements; on-chip frequency measurement units; physical testing; test platform; Circuit simulation; Circuit testing; Delay; Electronic equipment testing; Fabrication; Frequency measurement; Materials testing; Nanoscale devices; Nanostructured materials; Nanostructures;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2004. ISCAS '04. Proceedings of the 2004 International Symposium on

Print_ISBN

0-7803-8251-X

Type

conf

DOI

10.1109/ISCAS.2004.1328848

Filename

1328848