DocumentCode
418240
Title
A power-aware ME architecture using subsample algorithm
Author
Cheng, Hsien-Wen ; Dung, Lan-Rong
Author_Institution
Dept. of Electr. & Control Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
Volume
3
fYear
2004
fDate
23-26 May 2004
Abstract
This paper presents a power-aware architecture driven by a content-based subsample algorithm which allows the architecture to work at different power consumption modes with acceptable and smooth quality degradation. The proposed algorithm first performs the edge extraction to generate a turn-off mask which is used to reduce the switch activities of processing elements (PEs) in the semi-systolic array. Since we introduce an adaptive control mechanism to set the threshold value of edge determination, based on the video content and the remaining capacity of battery pack, the reduction of switch activities is rather stationary at a certain power consumption mode. As shown in simulation results, the architecture can dynamically operate at different power consumption modes with little quality degradation while the power overhead of edge extraction is under 0.8% comparing with the general subsample algorithm.
Keywords
content-based retrieval; data compression; edge detection; motion estimation; systolic arrays; adaptive control; battery pack capacity; content-based subsample algorithm; edge determination; edge extraction; power consumption modes; power overhead; power-aware ME architecture; processing elements; quality degradation; semisystolic array; switch activities reduction; threshold value; turn-off mask; video content; Adaptive control; Batteries; Computer architecture; Control engineering; Degradation; Energy consumption; MPEG standards; Motion estimation; Switches; Video compression;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2004. ISCAS '04. Proceedings of the 2004 International Symposium on
Print_ISBN
0-7803-8251-X
Type
conf
DOI
10.1109/ISCAS.2004.1328873
Filename
1328873
Link To Document