DocumentCode :
418308
Title :
A self-synchronized RF-interconnect for 3-dimensional integrated circuits
Author :
Gu, Qun ; Xu, Zhiwei ; Ko, Jenwei ; Hsien, Szukang ; Chang, M. Frank
Author_Institution :
Dept. of Electr. Eng., California Univ., Los Angeles, CA, USA
Volume :
4
fYear :
2004
fDate :
23-26 May 2004
Abstract :
A self-synchronized RF-interconnect technology (SSRFI), based on capacitor coupling and peak signal detection, is presented in this paper. It can be easily implemented in 3-dimensional ICs (3D-ICs) with small coupling capacitors (60 fF) to interconnect vertical active layers. The demonstrated SSRFI system, including both transmitter and receiver, has been designed, fabricated and verified in UMC 0.18 μm CMOS with a verified PRBS (Pseudo Random Binary Sequence) data rate of 3 Gbit/s and a BER (Bit Error Rate) of 1.2×10-10. The core circuit burns about 4 mW from a 1.8 V supply and occupies 0.02 mm2 chip area.
Keywords :
CMOS integrated circuits; binary sequences; capacitors; error statistics; integrated circuit interconnections; radiofrequency integrated circuits; random sequences; receivers; signal detection; transmitters; 0.18 micron; 1.8 V; 3 Gbit/s; 3-dimensional IC; 3-dimensional integrated circuits; 3D-IC; 60 fF; BER; CMOS; bit error rate; capacitor coupling; core circuit; coupling capacitors; peak signal detection; pseudorandom binary sequence data rate; receiver; self-synchronized RF-interconnect; transmitter; Capacitors; Couplings; Data communication; Integrated circuit interconnections; RF signals; Radio frequency; Radiofrequency interference; Signal detection; Three-dimensional integrated circuits; Transmitters;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2004. ISCAS '04. Proceedings of the 2004 International Symposium on
Print_ISBN :
0-7803-8251-X
Type :
conf
DOI :
10.1109/ISCAS.2004.1329004
Filename :
1329004
Link To Document :
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