Title :
Novel pipelining of MSB-first add-compare select unit structure for Viterbi decoders
Author :
Parhi, Keshab K.
Author_Institution :
Dept. of Electr. & Comput. Eng., Minnesota Univ., MN, USA
Abstract :
The convolutional codes are widely used in many communication systems due to their excellent error control performance. High speed Viterbi decoders for convolutional codes are of great interest for high data rate applications. In this paper, an improved most-significant-bit (MSB)-first bit-level pipelined add-compare select (ACS) unit structure is proposed. The ACS unit is the main bottleneck on the decoding speed of a Viterbi decoder. By balancing the settling time of different paths in the ACS unit, the length of the critical path is reduced as close as possible to the iteration bound in the ACS unit. With the proposed retimed structure, it is possible to decrease the critical path of the ACS unit by 12 to 15% compared with the conventional MSB-first structures. This reduction in critical path can reduce the level of parallelism (and area) required for a very highspeed (such as 10 Gbps) Viterbi decoder by about 25%.
Keywords :
Viterbi decoding; communication complexity; convolutional codes; decision circuits; pipeline arithmetic; MSB; Viterbi decoders; add-compare select unit structure; bottleneck; communication systems; convolutional codes; critical path; decoding speed; error control performance; high data rate applications; iteration bound; most significant bit; parallelism; pipelining; settling time; Application software; Convolutional codes; Error correction; Feedback loop; Feedforward systems; Hardware; Iterative decoding; Parallel processing; Pipeline processing; Viterbi algorithm;
Conference_Titel :
Circuits and Systems, 2004. ISCAS '04. Proceedings of the 2004 International Symposium on
Print_ISBN :
0-7803-8251-X
DOI :
10.1109/ISCAS.2004.1329318