Reduction of Positive-Bias-Stress Effects in Bulk-Accumulation Amorphous-InGaZnO TFTs

We report an abnormal negative threshold-voltage shift (ΔVTH) in bulk-accumulation (dual-gate driven) amorphous-InGaZnO (a-IGZO) thin-film transistors (TFTs) after application of positive-bias-stress (PBS). In devices annealed at 250°C for 2 h in vacuum, the negative ΔVTH is accompanied with subthreshold swing degradation, consistent with PBS-induced defect creation. Negative-bias-stress induces negligible ΔVTH, ruling out ion migration in the gate-insulator. By varying the top-gate length, it is found that the negligible ΔVTH is a function of bulk-accumulation. However, after vacuum annealing at 250°C for 100 h, PBS induces negligible ΔVTH, verifying that the negative ΔVTH in short-time annealed devices is related to defects in the bulk a-IGZO. Therefore, good PBS stability can be achieved in bulk-accumulation dual-gate a-IGZO TFTs by long-time vacuum anneal.