DocumentCode :
41991
Title :
Reducing the input test data volume under transparent scan
Author :
Pomeranz, Irith
Author_Institution :
Sch. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN, USA
Volume :
8
Issue :
1
fYear :
2014
fDate :
Jan-14
Firstpage :
1
Lastpage :
10
Abstract :
Under an approach to test compaction called transparent scan, a scan circuit is considered as a sequential circuit where the scan-chain inputs and scan-select input are included in the set of inputs of the circuit. This provides the flexibility to interleave functional and scan clock cycles in arbitrary ways, and enhances the ability of transparent-scan sequences to detect target faults. These features are used in this study for reducing the input test data volume by using the same scan-chain input sequences with different scan-select sequences to define transparent-scan sequences. The circuits under consideration have a scan chain that includes their state variables, primary inputs and primary outputs. Scan-chain input sequences are computed based on a given conventional scan-based test set that includes compacted single-cycle and two-cycle test sets for single stuck-at and transition faults, respectively. The set of scan-select sequences is fixed. Using the same scan-chain input sequences for defining several transparent-scan sequences, with different scan-select sequences, allows more faults to be detected with the same set of scan-chain input sequences. This allows the number of scan-chain input sequences to be reduced compared with the number of tests in the conventional scan-based test set.
Keywords :
clocks; fault diagnosis; logic testing; sequential circuits; fault detection; functional clock cycles; input test data volume reduction; primary inputs; primary outputs; scan circuit; scan clock cycles; scan-chain input sequences; scan-select input; scan-select sequences; sequential circuit; single stuck-at faults; single-cycle test sets; state variables; test compaction; transition faults; transparent scan; transparent-scan sequences; two-cycle test sets;
fLanguage :
English
Journal_Title :
Computers & Digital Techniques, IET
Publisher :
iet
ISSN :
1751-8601
Type :
jour
DOI :
10.1049/iet-cdt.2013.0067
Filename :
6695816
Link To Document :
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