Title :
Dual-mode RF receiver front-end using a 0.25-μm 60-GHz fT SiGe:C BiCMOS7RF technology
Author :
Moreira, C.P. ; Kerherve, E. ; Jarry, P. ; Shirakawa, A.A. ; Belot, D.
Author_Institution :
IXL Lab., Bordeaux Univ., Bordeaux, France
Abstract :
This paper presents a dual-mode RF receiver front-end consisting of a LNA, an active single-ended-to-differential converter and a downconversion mixer. It uses a high performance 0.25-μm 60-GHz fT SiGe:C BiCMOS7RF integration technology from STMicroelectronics. The proposed RF receiver front-end (RFFE) is targeted to GSM1800 (1805-1880MHz) and WCDMA-FDD (2110-2170MHz) systems. The main motivation of this work is to share as many elements as possible in both modes avoiding conventional parallel receiver chains, which is not a cost-efficient solution. The overall RFFE achievable gain is around 40dB in both modes. The overall front-end noise figure (Friis formula) is less than 1.3dB for GSM1800 and 1.6dB for WCDMA mode. These performances fulfil the systems requirements. The complete RFFE circuit consumes 18 mW in both operation modes at 2.5 V supply voltage.
Keywords :
BiCMOS integrated circuits; convertors; integrated circuit layout; mixers (circuits); radio receivers; radiofrequency amplifiers; radiofrequency integrated circuits; 0.25 micron; 18 mW; 1805 to 1880 MHz; 2.5 V; 2110 to 2170 MHz; 60 GHz; BiCMOS7RF integration technology; GSM1800 system; LNA; STMicroelectronics; SiGe:C; WCDMA FDD systems; active single-ended-to-differential converter; down conversion mixer; dual mode RF receiver front end; integrated circuit layout; parallel receiver chains; Circuit noise; Circuit simulation; Impedance matching; Inductors; Integrated circuit noise; Noise figure; Noise reduction; Radio frequency; Topology; Transistors;
Conference_Titel :
Integrated Circuits and Systems Design, 2004. SBCCI 2004. 17th Symposium on
Print_ISBN :
1-58113-947-0
DOI :
10.1109/SBCCI.2004.241023
