Vertically-integrated photonic multichip module architecture for vision applications

Adaptive vision applications that involve rapid object identification and moving object tracking, such as in envisioned augmented reality applications, increasingly place stringent upper bounds on processing latency. In addition to the requirement for low latency, many emerging vision models and algorithms involves operations that are parallel in nature, nonlinear in functionality, and both local and non-local in structure. The resulting computational complexity places correspondingly complex demands on envisioned hardware implementations. In order to satisfy these conjoint requirements, a hybrid electronic/photonic multichip module architecture that comprises multiple layers of silicon VLSI detection and processing circuitry, coupled in the vertical dimension with dense photonic fan-out/fan-in interconnections has been investigated. The interconnections are implemented by means of 2D arrays of either multiple quantum well modulators or VCSEL that are flip-chip bonded on a pixel-by-pixel basis to the silicon VLSI detector/processor array.