• DocumentCode
    4242
  • Title

    Junctionless Impact Ionization MOS: Proposal and Investigation

  • Author

    Ramaswamy, S. ; Kumar, M.J.

  • Author_Institution
    Dept. of Electr. Eng., IIT Delhi, New Delhi, India
  • Volume
    61
  • Issue
    12
  • fYear
    2014
  • fDate
    Dec. 2014
  • Firstpage
    4295
  • Lastpage
    4298
  • Abstract
    We propose a novel junctionless impact ionization MOS (JIMOS) on a p-type silicon film using charge plasma concept. This device does not have metallurgical junctions and requires no impurity doping for creating the source and drain. This makes the JIMOS combine the benefits of an impact ionization MOS (IMOS) (steep subthreshold slope) and a junctionless field-effect transistor (JLFET) (low thermal budget process). Using 2-D simulations, we show that the performance of the JIMOS is analogous to that of a corresponding IMOS in which the source and drain regions are created by impurity doping. The proposed idea can pave the way for fabricating the IMOS using a low thermal budget process similar to that of a JLFET.
  • Keywords
    MOSFET; impact ionisation; semiconductor doping; JIMOS; charge plasma concept; impurity doping; junctionless impact ionization MOS; low thermal budget process; metallurgical junction; p-type silicon film; steep subthreshold slope; Doping; Impact ionization; Logic gates; MOS technology; Semiconductor process modeling; Silicon; Charge-plasma; Technology Computer Aided Design (TCAD); Technology Computer Aided Design (TCAD).; impact ionization; impact ionization MOS (IMOS); junctionless; simulation;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/TED.2014.2361343
  • Filename
    6930768