3D electro-thermal modeling of ggNMOS ESD protection structure

Author

Xie, Haolu ; Zhan, Rouying ; Wang, Albert ; Gafiteanu, R.

Author_Institution

Dept. of Electr. & Comput. Eng., Illinois Inst. of Technol., Chicago, IL, USA

Volume

1

fYear

2004

fDate

6-9 Dec. 2004

Firstpage

61

Abstract

This work presents a simple-to-implement, 3D electro-thermal model for circuit-level SPICE simulation of grounded-gate NMOS (ggNMOS), with application for ESD (electrostatic discharge) protection circuit design verification. A new ESD discharging fitting resistor (R_on) is employed to improve ESD electrical modeling in the high-current region and a new 3D thermal resistor parameter (R_th) is proposed to model the electro-thermal characteristics of ggNMOS. The extraction method for the new parameters, R_on and R_th, is discussed. Finally, simulation results are presented and compared with experimental data.

Keywords

MOS integrated circuits; SPICE; circuit simulation; electrostatic discharge; integrated circuit design; integrated circuit modelling; 3D electro-thermal modeling; 3D thermal resistor parameter; ESD electrical modeling; ESD protection circuit design; SPICE simulation; electrostatic discharge; extraction method; grounded-gate NMOS; Breakdown voltage; Circuit simulation; Circuit synthesis; Electric breakdown; Electrostatic discharge; MOS devices; Protection; Resistors; SPICE; Thermal resistance;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2004. Proceedings. The 2004 IEEE Asia-Pacific Conference on

Print_ISBN

0-7803-8660-4

Type

conf

DOI

10.1109/APCCAS.2004.1412691

Filename

1412691