A novel timing recovery circuit with high tracking ability for burst-mode multi-level QAM transmission

Since the proposed timing recovery circuit can handle relatively large frequency offsets, manufacturing costs are quite low. To achieve both accurate timing synchronization and high tracking ability, a 2-stage timing recovery circuit is proposed, composed of an acquisition circuit and a tracking circuit. The proposed circuit has the two major features: (1) half-operation rate of the "square-type" acquisition circuit (corresponds to the Nyquist rate); (2) high performance tracking circuit. Even if the timing frequency offset is as much as ±100 ppm, the proposed circuit achieves overall timing error (mean error + RMS error) of 6°, which holds the C/N degradation to only 0.3 dB for 64QAM transmission and required BER of 3×10^-4. The proposed circuit shows sufficient performance for the target 64QAM 40-Mbaud system.