DocumentCode
435100
Title
IR drop and ground bounce awareness timing model
Author
Shao, Muzhou ; Gao, Youxin ; Yuan, Li-Pen ; Wong, Martin D F
Author_Institution
Synopsys Inc., Mountain View, CA, USA
fYear
2005
fDate
11-12 May 2005
Firstpage
226
Lastpage
231
Abstract
As the IC technology scales down, the effect of IR drop/ground bounce becomes increasingly significant. IR drop and ground bounce can compromise the gate driving capability and degrade the IC performance, and even can make IC functional failures. Hence, it is crucial to capture this effect efficiently and accurately in order to improve circuit reliability. In this paper, we proposed a timing model with consideration of IR drop and ground bounce. Our model can be derived directly from the existing timing tables (e.g. Synopsys.db or CLF tables), which are used in normal timing analysis. Compared with the traditional k-factor approach, our method does not require SPICE netlist and SPICE simulations. Moreover, the accuracy of our model is better than k-factor approach.
Keywords
circuit simulation; integrated circuit modelling; integrated circuit reliability; logic design; timing; IR drop-and-ground bounce awareness timing model; circuit reliability; timing analysis; Circuits; Curve fitting; Degradation; Delay effects; Polynomials; Runtime; SPICE; Timing; Transistors; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI, 2005. Proceedings. IEEE Computer Society Annual Symposium on
Print_ISBN
0-7695-2365-X
Type
conf
DOI
10.1109/ISVLSI.2005.44
Filename
1430137
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