• DocumentCode
    435224
  • Title

    ATPG based functional test for data paths: application to a floating point unit

  • Author

    Bayraktaroglu, Ismet ; D´Abreu, Manuel

  • Author_Institution
    Design for Test Technol. Group, Sun MicroSystems Inc., Sunnyvale, CA, USA
  • fYear
    2004
  • fDate
    10-12 Nov. 2004
  • Firstpage
    37
  • Lastpage
    40
  • Abstract
    Application of an ATPG based functional test methodology that is tailored towards data paths to a floating point unit is described. The methodology employs the instruction set of the processor to control the inputs and to observe the outputs of the data path and utilizes an ATPG tool to generate test patterns. The test patterns are then converted to instruction sequences and applied as a functional test. This methodology provides high at-speed coverage without the performance and area overhead of the traditional structural testing. While we target stuck-at faults in this work, the methodology is applicable to other faults models, including delay faults.
  • Keywords
    automatic test pattern generation; fault diagnosis; floating point arithmetic; instruction sets; logic testing; ATPG-based functional data path test; automatic test pattern generation; delay faults; floating point unit; instruction sequences; processor instruction set; structural testing; stuck-at faults; Application software; Automatic test pattern generation; Automatic testing; Circuit faults; Circuit testing; Delay; Hardware; Microprocessors; Sun; Test pattern generators;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    High-Level Design Validation and Test Workshop, 2004. Ninth IEEE International
  • ISSN
    1552-6674
  • Print_ISBN
    0-7803-8714-7
  • Type

    conf

  • DOI
    10.1109/HLDVT.2004.1431230
  • Filename
    1431230