DocumentCode
435751
Title
Integrated power transistor application of three-dimensional sidewall-channel MOS transistor
Author
Sunami, Hideo ; Kobnvashi, K. ; Matsumura, Shunpei
Author_Institution
Res. Center for Nanodevices & Syst., Hiroshima Univ., Japan
Volume
1
fYear
2004
fDate
18-21 Oct. 2004
Firstpage
336
Abstract
Sonic possible applications of 3D MOS transistors are proposed in this study focusing on processing techniques to realize tall silicon beam with very high aspect-ratio, overlaying gate formation, and 3D plasma doping into the tall beam. In addition to the possibility of the techniques, limitations to further scaling are discussed in this study.
Keywords
MOSFET; plasma immersion ion implantation; power transistors; semiconductor doping; silicon; 3D MOS transistors; 3D plasma doping; gate formation; integrated power transistor; sidewall-channel MOS transistor; silicon beam; Doping; Etching; FETs; FinFETs; Ice; Large scale integration; MOSFETs; Petroleum; Power transistors; Silicon;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State and Integrated Circuits Technology, 2004. Proceedings. 7th International Conference on
Print_ISBN
0-7803-8511-X
Type
conf
DOI
10.1109/ICSICT.2004.1435021
Filename
1435021
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