DocumentCode
435808
Title
Multi-bit MONOS nonvolatile memory based on double-gate technology
Author
Chan, Alain Chun Keung ; Yuen, Kam Hung ; Man, Tsz Yin ; Chan, Mansun
Author_Institution
Dept. of Electr. & Electron. Eng., Hong Kong Univ. of Sci. & Technol., China
Volume
1
fYear
2004
fDate
18-21 Oct. 2004
Firstpage
691
Abstract
A multi-bits/cell double gate oxide-nitride-oxide nonvolatile memory is proposed and demonstrated by numerical device simulation. The operational mechanisms including read, program, erase and inhibit in an array structure are studied in detail. This multi-bit storage capability per single cell is very suitable for high density NVM application. With a slight modification, the proposed structure can achieve double program/read rate by programming/reading 2 bits of the memory cell simultaneously.
Keywords
MOS memory circuits; random-access storage; double-gate technology; multibit MONOS nonvolatile memory; multibits storage capability; oxide-nitride-oxide nonvolatile memory; Dielectrics; Electrons; Ice thickness; MONOS devices; MOSFETs; Nonvolatile memory; Numerical simulation; Semiconductor films; Thickness control; Tiles;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State and Integrated Circuits Technology, 2004. Proceedings. 7th International Conference on
Print_ISBN
0-7803-8511-X
Type
conf
DOI
10.1109/ICSICT.2004.1435097
Filename
1435097
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