• DocumentCode
    435908
  • Title

    Sub-100nm strained Si CMOS: device performance and circuit behavior

  • Author

    Yang, L. ; Watling, J.R. ; Asenov, A. ; Barken, J.R. ; Roy, S.

  • Author_Institution
    Dept. of Electron. & Electr. Eng., Glasgow Univ., UK
  • Volume
    2
  • fYear
    2004
  • fDate
    18-21 Oct. 2004
  • Firstpage
    983
  • Abstract
    Using comprehensive device simulations, performance enhancement of sub-100nm strained Si MOSFETs has been investigated. Circuit behavior of conventional Si, strained Si, conventional Si SOI and strained SOI ring oscillators has been assessed.
  • Keywords
    CMOS integrated circuits; MOSFET; circuit simulation; elemental semiconductors; oscillators; silicon; silicon-on-insulator; Si; circuit behavior; conventional Si SOI ring oscillators; device simulation; strained SOI ring oscillators; strained Si CMOS; strained Si MOSFET; Acoustic scattering; Calibration; Capacitive sensors; Circuit simulation; Electromagnetic compatibility; MOSFETs; Medical simulation; Optical scattering; Particle scattering; Phonons;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State and Integrated Circuits Technology, 2004. Proceedings. 7th International Conference on
  • Print_ISBN
    0-7803-8511-X
  • Type

    conf

  • DOI
    10.1109/ICSICT.2004.1436670
  • Filename
    1436670
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=435908