Impact of leakage currents on MOSFET noise performance in deep sub-micron regime

With the scaling down of the feature size of MOS devices, leakage currents severely influence the performance of the device. In this paper, the impact of gate and junction leakage currents on the RF MOSFET noise performance in sub-100 nm regime is investigated extensively by the numerical simulation. At the same tune, an analytical model of noise parameters including the gate and drain/source junction leakage is also presented. The results show that leakage currents can influence the noise behavior to a large extent. This analysis can be used as a design guideline for the optimization of noise performance in sub-100nm MOSFET.