DocumentCode
435944
Title
Advanced compact modeling of logic devices toward CMOS scaling limits
Author
An, Judy Xilin ; Chen, Qiang ; Xiang, Qi
Author_Institution
Technol. Dev. Group, Adv. Micro Devices, Sunnyvale, CA, USA
Volume
2
fYear
2004
fDate
18-21 Oct. 2004
Firstpage
1171
Abstract
Sonic research work on advanced compact modeling of nonclassical logic devices is reviewed in this paper. Advanced logic devices toward CMOS scaling limits are ill so reviewed as background information so as to understand the physics and features demanded by the non-classical logic devices and thus the challenges of modeling these devices.
Keywords
CMOS integrated circuits; integrated circuit modelling; logic devices; CMOS scaling limits; advanced compact modeling; nonclassical logic devices; Acceleration; CMOS technology; Capacitive sensors; Double-gate FETs; Electron mobility; Logic devices; MOS devices; MOSFETs; Semiconductor device modeling; Silicon;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State and Integrated Circuits Technology, 2004. Proceedings. 7th International Conference on
Print_ISBN
0-7803-8511-X
Type
conf
DOI
10.1109/ICSICT.2004.1436732
Filename
1436732
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