DocumentCode
435983
Title
Integrate binary mapping into task scheduling for hardware/software partitioning
Author
Peng, YiPin ; Ming, Lin
Author_Institution
Nat. ASIC Center, Southeast Univ., Nanjing, China
Volume
2
fYear
2004
fDate
18-21 Oct. 2004
Firstpage
1396
Abstract
This paper presents an approach integrate binary mapping into task scheduling for hardware-software partitioning. During the process, a critical-path analysis technique and hardware cost prediction technique are provided to driver hardware/software partitioning. The partitioning approach primarily deal with data dominated designs such as MPEG and MP3. Finally, we provide our experiment results to illustrate the effectiveness of our methodology.
Keywords
digital signal processing chips; hardware-software codesign; logic design; MP3; MPEG; critical-path analysis; hardware cost prediction; hardware-software partitioning; integrated binary mapping; task scheduling; Application specific integrated circuits; Cost function; Data processing; Digital audio players; Embedded software; Embedded system; Hardware; Lapping; Simulated annealing; System performance;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State and Integrated Circuits Technology, 2004. Proceedings. 7th International Conference on
Print_ISBN
0-7803-8511-X
Type
conf
DOI
10.1109/ICSICT.2004.1436822
Filename
1436822
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