Design and analysis of digital lock-in sine-wave amplitude detector based on TMS320C6xEVM

Author

Qian, Liping ; Cheng, Deli ; Zhang, Juntuan ; Wang, Yanzhang ; Zheng, Guifeu

Author_Institution

DSP Lab., Jilin Univ., Changchun, China

Volume

3

fYear

2004

fDate

31 Aug.-4 Sept. 2004

Firstpage

2545

Abstract

In order to recover the amplitude of weak sine wave that is usually buried in strong noise, a digital lock-in detector (DLID) has been proposed based on TMS320C6xEVM. The theory and structure of DLID are given in brief. Especially in the paper, some factors that would directly affect the frequency-resolution and lock-in precision of DLID are analyzed in detail, such as the integral time constant, the synchronization, the sample frequency, the dynamic range and the data type. Based on experiments, some consideration and suggestion are given to choose those important factors when you use or design a high performance DLID in your application.

Keywords

digital signal processing chips; network analysis; network synthesis; phase detectors; signal detection; signal resolution; synchronisation; TMS320C6xEVM; data type; digital lock-in sine-wave amplitude detector; dynamic range; frequency-resolution; integral time constant; lock-in precision; sample frequency; synchronization; weak sine wave; Codecs; Detectors; Digital signal processing; Frequency synchronization; Instruments; Laboratories; Noise level; Optical noise; Phase detection; Signal detection;

fLanguage

English

Publisher

ieee

Conference_Titel

Signal Processing, 2004. Proceedings. ICSP '04. 2004 7th International Conference on

Print_ISBN

0-7803-8406-7

Type

conf

DOI

10.1109/ICOSP.2004.1442300

Filename

1442300