Co-design of an IPv6 protocol processing engine with sequential predicate logic invocations

Support of fast lookup of content addresses in IPv6 domains is an important feature for next generation network processing engines. While IPv6 forwarding and IPv6 transition microblocks may simplify the engineering efforts needed to support next generation routing solutions, there must be an efficient and fast mechanism for processing IPv6 headers prior to this. In this paper, we try to develop an IPv6 protocol processing engine based on sequential predicate logic invocations. The design, based on abstract state machines (ASM) logic, shows how the design features may help in resolving scalability issues for large scale IPv6 routing. The novelty of the approach lies in the formal predicate logic definition and synthesis of processing hardware and generation of physical design unit from the data-driven algorithm function computation at compile time