DocumentCode :
438398
Title :
A wideband hierarchical circuit reduction for massively coupled interconnects
Author :
Yu, Hao ; He, Lei ; Qi, Zhenyu ; Tan, Sheldon X D
Author_Institution :
Dept. of Electr. Eng., California Univ., Los Angeles, CA, USA
Volume :
1
fYear :
2005
fDate :
18-21 Jan. 2005
Firstpage :
111
Abstract :
We develop a realizable circuit reduction to generate the interconnect macro-model for parasitic estimation in wideband applications. The inductance is represented by VPEC (vector potential equivalent circuit) model, which not only enables the passive sparsification but also gives correct low-frequency response, whereas the recent Y-Δ circuit reduction intrinsically has inaccurate ac value and low-frequency response due to nodal-susceptance formulation. Applying hierarchical circuit-reduction enhanced by multi-point expansions, we can obtain an accurate high-order impedance function to capture the high-frequency response. The impedance function is further enforced passivity by convex programming, and realized by a Foster´s synthesis. Experiments show that our method is as accurate as PRIMA in high frequency range, but leads to a realized circuit model with up to 10× times less complexity and up to 8× smaller simulation time. In addition, under the same reduction ratio, its error margin is less than that for the time-constant based reduction in both time-domain and frequency-domain simulations.
Keywords :
circuit complexity; convex programming; equivalent circuits; integrated circuit interconnections; integrated circuit modelling; Foster synthesis; VPEC model; Y-Δ circuit reduction; circuit complexity; convex programming; frequency-domain simulation; hierarchical circuit reduction; high-frequency response; high-order impedance function; interconnect macro-model; low-frequency response; massively coupled interconnects; multipoint expansions; nodal-susceptance formulation; parasitic estimation; time-constant based reduction; time-domain simulation; vector potential equivalent circuit; wideband applications; wideband circuit reduction; Circuit simulation; Circuit synthesis; Coupling circuits; Equivalent circuits; Frequency; Functional programming; Impedance; Inductance; Integrated circuit interconnections; Wideband;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 2005. Proceedings of the ASP-DAC 2005. Asia and South Pacific
Print_ISBN :
0-7803-8736-8
Type :
conf
DOI :
10.1109/ASPDAC.2005.1466141
Filename :
1466141
Link To Document :
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