• DocumentCode
    439213
  • Title

    An EEPROM in a standard CMOS technology

  • Author

    Eynde, F. Op´t ; Zorio, C.

  • Author_Institution
    Mixed Silicon Structures, Roubaix, France
  • fYear
    1997
  • fDate
    16-18 Sept. 1997
  • Firstpage
    264
  • Lastpage
    267
  • Abstract
    In this paper, an EEPROM circuit compatible with a standard CMOS technology is presented. The circuit requires no additional processing steps. An 8 × 8 bit prototype occupies 0.6 mm2in a 1.5µm CMOS technology. This circuit offers a re-programmable alternative for zener zapping or fuse blowing.
  • Keywords
    Breakdown voltage; CMOS process; CMOS technology; Circuits; Costs; EPROM; Fuses; MOSFETs; Nonvolatile memory; Tunneling;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference, 1997. ESSCIRC '97. Proceedings of the 23rd European
  • Conference_Location
    Southampton, UK
  • Type

    conf

  • Filename
    1470914
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=439213