• DocumentCode
    439235
  • Title

    A full-custom self-timed DSP processor implementation

  • Author

    Laiho, Mikko ; Vainio, Olli

  • Author_Institution
    Tampere University of Technology, Tampere, Finland
  • fYear
    1997
  • fDate
    16-18 Sept. 1997
  • Firstpage
    356
  • Lastpage
    359
  • Abstract
    Asynchronous self-timed control and DCVSL logic have been used in the construction of a complete VLSI processor, targeted for DSP algorithms. The 16-bit architecture includes both data and program memory, and uses a data-stationary control structure. The experimental VLSI circuit includes 143 000 transistors and has been fabricated using 0.8µm CMOS.
  • Keywords
    CMOS logic circuits; CMOS memory circuits; Digital signal processing; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference, 1997. ESSCIRC '97. Proceedings of the 23rd European
  • Conference_Location
    Southampton, UK
  • Type

    conf

  • Filename
    1470937
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=439235