DocumentCode
439248
Title
200 megasample per second 6 bit A/D converter
Author
Leuthold, Oskar
Author_Institution
GEC Plessey Semiconductors, Scotts Valley, USA
fYear
1997
fDate
16-18 Sept. 1997
Firstpage
408
Lastpage
411
Abstract
A 200 Megasample per second flash A/D converter was built on a standard digital 5V 0.6µ CMOS process in an area of 1.5 square millimeters. The effects of metastability and bubbles were addressed to achieve a low error rate of 1e-9.
Keywords
CMOS process; Capacitors; Decoding; Error analysis; Latches; MOS devices; Metastasis; Read only memory; Switches; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 1997. ESSCIRC '97. Proceedings of the 23rd European
Conference_Location
Southampton, UK
Type
conf
Filename
1470950
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