DocumentCode
439290
Title
IC for interbus loop system
Author
Bontempo, G. ; Calabrese, G. ; Colletti, P. ; Pulvirenti, F. ; Ursino, R. ; Bartelheim, J. ; Detert, V.
Author_Institution
SGS-Thomson Micro electronics, Catania, Italy
fYear
1998
fDate
22-24 Sept. 1998
Firstpage
232
Lastpage
235
Abstract
The present paper describes an IC for Interbus Loop System developed in BCD technology third generation. The device, called LPC2, is an ASIC fieldbus intended to simplify the direct connection of analog and digital sensors and actuators. On the same chip a Receiver and a Transmitter are integrated to communicate with the Master and the other Slaves, a Protocol State Machine to manage and elaborate the data flow, a Multifunctional User Interface for the data exchange and for the networking of sensors and actuators. The typical application is based on a clocked ring structure for easy error diagnostic and high noise immunity in a very harsh industrial environment. Two unschielded wires are used for both power supply and data transmission compatible with standard fieldbus Interbus.
Keywords
Actuators; Application specific integrated circuits; Clocks; Field buses; Master-slave; Paper technology; Protocols; Transmitters; User interfaces; Working environment noise;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 1998. ESSCIRC '98. Proceedings of the 24th European
Type
conf
DOI
10.1109/ESSCIR.1998.186251
Filename
1471008
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