• DocumentCode
    439339
  • Title

    Time-domain minimum-distance detector and its application to low power coding scheme on chip interface

  • Author

    Ikeda, M. ; Asada, K.

  • Author_Institution
    University of Tokyo, Tokyo, Japan
  • fYear
    1998
  • fDate
    22-24 Sept. 1998
  • Firstpage
    464
  • Lastpage
    467
  • Abstract
    This paper describes a minimum-distance detector based on a time-domain technique. In this technique, Hamming-distance of data is translated to delay time, and the minimum distance one fastest data is selected using a time-domain winner-take-all circuit. We describe that this technique is possible to realize using simple logic circuits so that it can achieve small chip area and short delay time. We fabricated test chips for the detector, and demonstrated 21.6[ns] for detecting the minimum distance data from eight 16-bit data, using 1.2µm CMOS technology. We show a data encoding chip for low power chip interface as an application of the detector.
  • Keywords
    CMOS technology; Circuit testing; Delay effects; Detectors; Flip-flops; Image coding; Logic circuits; Space vector pulse width modulation; Time domain analysis; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference, 1998. ESSCIRC '98. Proceedings of the 24th European
  • Conference_Location
    The Hague, The Netherlands
  • Type

    conf

  • DOI
    10.1109/ESSCIR.1998.186309
  • Filename
    1471066