• DocumentCode
    439379
  • Title

    High speed capacitive coupled interface for multipoint connections

  • Author

    Schmidt, A. ; Hoffman, K. ; Kowarik, O. ; Pfeiffer, R. ; Moyal, M.

  • Author_Institution
    Universitaet der Bundeswehr Muenchen, Neubiberg
  • fYear
    1999
  • fDate
    21-23 Sept. 1999
  • Firstpage
    138
  • Lastpage
    141
  • Abstract
    A capacitivly coupled interface for a bidirectional data bus like a Controller-DRAM-bus with data transfer rates up to 1Gb/s at a power supply voltage of 1.5V is presented. All receivers are capacitively coupled to the data bus. The CMOS receiver consumes 1.65mW DC-power in a 0.35µm technology. The computed power consumption of the driver for a bus with five I/Os is reduced approximatly to 1/4 and to 1/8 in comparison with a SSTL (Stub Series Terminated Logic) system and a RSL (Rambus Signaling Logic) system at a transfer rate of 1Gb/s respectively.
  • Keywords
    Bandwidth; CMOS logic circuits; Capacitance; Energy consumption; Optical signal processing; Power supplies; Radiofrequency interference; Reflection; Resistors; Voltage control;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference, 1999. ESSCIRC '99. Proceedings of the 25th European
  • Conference_Location
    Duisburg, Germany
  • Type

    conf

  • Filename
    1471115