• DocumentCode
    439447
  • Title

    Design and optimization of sense-amplifier-based flip-flops

  • Author

    Nikolic, B. ; Oklobdzija, V.G.

  • Author_Institution
    University of California, Davis, United States
  • fYear
    1999
  • fDate
    21-23 Sept. 1999
  • Firstpage
    410
  • Lastpage
    413
  • Abstract
    An improved design of a sense-amplifier-based flip-flop is presented. The new design overcomes the problems of floating nodes, which is a weakness of previously reported solutions. This is achieved by systematic derivation of flip-flop equations and rearranging the resulting network. The resulting flip-flop outperforms earlier published structures, exhibiting TCQof 190ps when driving 100fF load in a 0.18µm CMOS technology.
  • Keywords
    CMOS technology; Clocks; Delay effects; Design optimization; Equations; Flip-flops; High power amplifiers; Logic functions; Pulse amplifiers; Strontium;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference, 1999. ESSCIRC '99. Proceedings of the 25th European
  • Conference_Location
    Duisburg, Germany
  • Type

    conf

  • Filename
    1471183
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=439447