DocumentCode
439572
Title
A 17 mW, 2.5 GHz fractional-N frequency synthesizer for CDMA-2000
Author
Lee, Sang-Oh ; Yoh, Minjong ; Lee, Junghyun ; Ryu, Inhyo
Author_Institution
Samsung Electronics, Seoul, Korea
fYear
2001
fDate
18-20 Sept. 2001
Firstpage
9
Lastpage
12
Abstract
A 2.5 GHz fractional-N frequency synthesizer in 0.5- µm 15-GHz ft BiCMOS employs one-bit 4th-order ΣΔ modulator with multiple feedback and pulse-swallowed dual-modulus divider, resulting in simple architecture, less sensitivity to PLL nonlinearities, and lower out-of-band phase noise. Measurements, with a 3rd-order LPF, show -139 dBc/Hz phase noise at 1.2 MHz offset from carrier frequency of 1643 MHz and less than -87 dBc in-band fractional spurs. It consumes 5.5 mA at 3 V.
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2001. ESSCIRC 2001. Proceedings of the 27th European
Conference_Location
Villach, Austria
Type
conf
Filename
1471321
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