• DocumentCode
    439604
  • Title

    A low-power parallel processor IC for digital video cameras

  • Author

    Abbo, A.A. ; Kleihorst, R.P. ; Sevat, L. ; Wielage, P. ; van Veen, R. ; De Beeck, M. J R Op ; van der Avoird, A.

  • Author_Institution
    Philips Research Laboratories, Eindhoven, The Netherlands
  • fYear
    2001
  • fDate
    18-20 Sept. 2001
  • Firstpage
    137
  • Lastpage
    140
  • Abstract
    We present a digital signal processor to be combined with a 30 frames per second VGA-format CMOS or CCD image sensor or any other source of digital video data. The processor is fully programmable and therefore able to run a variety of algorithms ranging from image communication to machine vision. The IC comprises a parallel processor array and a special purpose controller to achieve high computational performances (up to 5 GOPS) with a very modest power consumption. This can go down to 30 mWatts for simple applications such as a digital camera for video conferencing. The chip has been realized in a 0.18 µm CMOS process and takes up an area of 22 mm2.
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference, 2001. ESSCIRC 2001. Proceedings of the 27th European
  • Conference_Location
    Villach, Austria
  • Type

    conf

  • Filename
    1471353