DocumentCode
439679
Title
Automated processor generation for system-on-chip
Author
Rowen, Chris ; Maydan, Dror
Author_Institution
Tensilica, Inc., Santa Clara, CA, United States
fYear
2001
fDate
18-20 Sept. 2001
Firstpage
464
Lastpage
469
Abstract
New application-focused system-on-chip platforms motivate new application-specific processors. Configurable and extensible processor architectures offer the efficiency of tuned logic solutions with the flexibility of standard high-level programming methodology. Automated extension of processor function units and the associated software environment - compilers, debuggers, simulators and real-time operating systems - satisfies these needs. At the same time, designing at the level of software and instruction set architecture significantly shortens the design cycle and reduces verification effort and risk. This paper describes the key dimensions of extensibility within the processor architecture, the instruction set extension description language and the means of automatically extending the software environment from that description. It also describes two groups of benchmarks, EEMBC´s Consumer and Telecommunications suites, that show 20 to 40 times acceleration of a broad set of algorithms through application-specific instruction set extension, relative to high performance RISC processors.
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2001. ESSCIRC 2001. Proceedings of the 27th European
Conference_Location
Villach, Austria
Type
conf
Filename
1471433
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