Reliable handling of fempto-ampere currents in standard CMOS

In this paper we show and validate a reliable circuit design technique for current mode signal processing down to fempto-amperes. The technique involves specific-current extractors and logarithmic current splitters for obtaining on-chip sub-pA currents. It is based on "source voltage shifting". A special current mirror based on this technique is also introduced for reliably replicating such low currents. To monitor and measure currents down to a few fempto-amps a special on-chip saw-tooth oscillator is used. This way, sub-pA currents are characterized without driving them off-chip, nor requiring expensive instrumentation with complicated low leakage setups. Experimental results of the described blocks are provided, as well as a technique for characterizing the noise of transistors driving such small currents. As an application example, a simple log-domain first-order low-pass filter is implemented that uses a 100fF capacitor to achieve a 3dB frequency of 0.5Hz, using an area of 12µm × 24.35µm in a 0.35µm CMOS process.